Future of Low-Power Chips in Doubt

This article brings an issue which will need torough investigation:

http://spectrum.ieee.org/semiconductors/devices/future-of-lowpower-chips-in-doubt

I have known for quite a while that there exists a threat to low-power logic circuits as their dimensions continue to shrink and the voltage at which they operate decreases. It is quite clear that they are less immune to background nose coming from PWMs which are so common in robotics for example, big motors whose magnetic fields can impact nereby PLCs even in a Faraday cage, any other source of EM noise or even neutrons which can sometime erase aircraft computer memories.

I truly  envision a downsizing limit for safety reasons.

This could be the subject a very nice PhD.

Luc